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Update divmod post
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title = "divmod, Rust, x86, and Optimisation"
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title = "divmod, Rust, x86, and Optimisation"
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date = 2023-01-11T19:48:09+10:00
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date = 2023-01-11T19:48:09+10:00
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#[extra]
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[extra]
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#updated = 2022-04-21T09:07:57+10:00
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updated = 2023-01-11T21:11:28+10:00
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While reviewing some Rust code that did something like this:
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While reviewing some Rust code that did something like this:
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@ -86,8 +86,21 @@ instruction sequence that uses 32-bit registers. According to [the testing done
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in this report][timing] 32-bit `div` has lower latency—particularly on older
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in this report][timing] 32-bit `div` has lower latency—particularly on older
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models.
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models.
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I wasn't able to work out why each implementation zeros `edx`. If you know,
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~~I wasn't able to work out why each implementation zeros `edx`. If you know,
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send me a message and I'll update the post.
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send me a message and I'll update the post.~~
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**Update:** [Brion Vibber on the Fediverse][edx] provided this explanation as to why `edx`
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is being zeroed:
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> iirc rdx / edx is the top word for the x86 division operation, which takes a double-word numerator -- the inverse of multiplication producing a double-word output.
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This makes sense and looking back at [the docs][div] it does say that:
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> 32-bit: Unsigned divide EDX:EAX by r/m32, with result stored in EAX := Quotient, EDX := Remainder.
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> 64-bit: Unsigned divide RDX:RAX by r/m64, with result stored in RAX := Quotient, RDX := Remainder.
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[View the Example on Compiler Explorer](https://rust.godbolt.org/z/hj9rb4Txa)
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[View the Example on Compiler Explorer](https://rust.godbolt.org/z/hj9rb4Txa)
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@ -96,3 +109,4 @@ send me a message and I'll update the post.
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[div]: https://www.felixcloutier.com/x86/div
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[div]: https://www.felixcloutier.com/x86/div
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[compiler-explorer]: https://rust.godbolt.org/
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[compiler-explorer]: https://rust.godbolt.org/
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[timing]: https://gmplib.org/~tege/x86-timing.pdf
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[timing]: https://gmplib.org/~tege/x86-timing.pdf
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[edx]: https://bikeshed.vibber.net/@brion/109670222269686433
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